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Integrated Circuit Systems, Inc.
LOW SKEW 1-TO-16 FANOUT BUFFER
FEATURES
* 16 LVCMOS outputs * Output frequency up to 200MHz * 250ps output skew * 700ps part to part * CMOS compatible clock input at 5V, LVTTL and LVCMOS compatible at 3.3V and 2.5V * LVTTL output enable inputs * Dual output enable inputs facilitates 1-to-16 or 1-to-8 input to output modes * 3.3V, 2.5V or mixed 3.3V, 2.5V from 0C to 70C ambient operating temperature * 32 lead low-profile QFP(LQFP), 7mm x 7mm x 1.4mm package body, 0.8mm package lead pitch
ICS8343
The ICS8343 is a low skew, 1-to-16 Fanout Buffer and a member of the HiPerClockS HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS8343 is at 3.3V, 2.5V and mixed 3.3V input and 2.5V supply modes over the commercial temperature range. Guaranteed output and part-to-part skew characteristics make the ICS8343 ideal for those clock distribution applications demanding well defined performance and repeatability.
GENERAL DESCRIPTION
,&6
BLOCK DIAGRAM
VDD1 VDD VDD2
PIN ASSIGNMENT
OE1 OE2 Q15 Q14 Q13 Q2 Q1 Q0
CLK
32 31 30 29 28 27 26 25
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8
VDD1 VDD1 VDD1 Q3 Q4 GND GND GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Q5 Q6 Q7 CLK VDD Q8 Q9 Q10
24 23 22
VDD2 VDD2 VDD2 Q12 Q11 GND GND GND
ICS8343
21 20 19 18 17
OE1
GND
OE2
32-Lead LQFP (Top View)
8343
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Integrated Circuit Systems, Inc.
TABLE 1. PIN DESCRIPTIONS
Number 1, 2, 3 4, 5 6, 7, 8 9, 10, 11 12 13 14, 15, 16 17, 18, 19 20, 21 22, 23, 24 25, 26, 27 28 29 30, 31, 32 Name VDD1 Q3, Q4 GND Q5, Q6, Q7 CLK VDD Q8, Q9, Q10 GND Q11, Q12 VDD2 Q13, Q14, Q15 OE2 OE1 Q0, Q1, Q2 Pow er Output Pow er Output Input Pow er Output Pow er Output Pow er Output Input Input Output Pullup Pullup Ty pe Description
LOW SKEW 1-TO-16 FANOUT BUFFER
ICS8343
Output Q0 thru Q7 pow er supply. Connect to 5V, 3.3V or 2.5V. Clock outputs. 14 typical output impedance. Connect to ground. Clock outputs. 14 typical output impedance. Clock input. Input pow er supply. Connect to 5V, 3.3V or 2.5V Clock outputs. 14 typical output impedance. Connect to ground. Clock outputs. 14 typical output impedance. Output Q8 thru Q15 pow er supply. Connect to 5V, 3.3V or 2.5V. Clock outputs. 14 typical output impedance. Output enable. When low forces outputs Q8 thru Q15 to HiZ state. Output enable. When low forces outputs Q0 thru Q7 to HiZ state. Clock outputs. 14 typical output impedance.
TABLE 2. PIN CHARACTERISTICS
Sy mbol CIN CPD Parameter Input Capacitance Pow er Dissipation Capacitance (per output) VDD1, VDD2 = 5.25V VDD1, VDD2 = 3.47V VDD1, VDD2 = 2.63V 15 11 9.5 Test Conditions Minimum Ty pical Maximum Units pF pF pF pF
TABLE 3. FUNCTION TABLE
Inputs OE1 0 1 0 1 OE2 0 0 1 1 Q0 thru Q7 Hi Z Active Hi Z Active Outputs Q8 thru Q15 Hi Z Hi Z Active Active
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ABSOLUTE MAXIMUM RATINGS
Supply Voltage Inputs Outputs Ambient Operating Temperature Storage Temperature 7V -0.5V to VDD+0.5 V -0.5V to VDD+0.5V 0C to 70C -65C to 150C
LOW SKEW 1-TO-16 FANOUT BUFFER
ICS8343
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any conditions beyond those listed in the DC Electrical Characteristics or AC Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
TABLE 4A. DC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V5%, TA = 0 TO 70C
Sy mbol VDD, VDD1, VDD2 VIH VIL IIH IIL IDD VOH VOL IOZH IOZL Parameter Operating Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current CLK OEx CLK OEx CLK OEx CLK OEx Input Operating Supply Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current VDD = 3.135V, IOH = -25mA VDD = 3.135V, IOL = 25mA OEx = 0V, VOUT = VDD OEx = 0V, VOUT = 0V -1 2.4 0.8 1 VDD = 3.465V VDD = 3.465V VDD = 3.135V VDD = 3.135V VIN = VDD VIN = VDD VIN = 0V VIN = 0V -15 -15 100 Test Conditions Minimum 3.135 2 2 -0.3 -0.3 Ty pical 3.3 Maximum 3.465 VDD + 0.3 VDD + 0.3 0.8 0.8 1 1 Units V V V V V A A A A A V V A A
TABLE 5A. AC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 3.3V5%, TA = 0 TO 70C
Sy mbol fMAX tpLH tpHL tsk(o) tsk(p) tsk(pp) tR tF tPW NOTE 1: NOTE 2: NOTE 3: NOTE 4: NOTE 5: Parameter Maximum Input Frequency Propagation Delay, Low -to-High Propagation Delay, High-to-Low Output Skew ; NOTE 3 Process Skew ; NOTE 4 Part-to-Part Skew ; NOTE 5 Output Rise Time Output Fall Time Output Pulse Width tCY CLE/2 - 0.5 0 < f 200MHz 0 < f 200MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 0.5 0.9 tCY CLE/2 1.1 1.2 2.1 2.0 Test Conditions Minimum Ty pical Maximum 200 3.1 2.7 250 450 700 0.8 1.7 tCY CLE/2 + 0.5 Units MHz ns ns ps ps ps ns ns ns
All parameters measured at fMAX unless noted otherw ise. Outputs terminated w ith 50 resistor connected to VDDx/2. Defined as skew across outputs at the same supply voltages and w ith equal load conditions. Defined as skew at the same output on different devices operating at the same supply voltages and w ith equal load conditions. Defined as skew at different outputs on different devices operating at the same supply voltages and w ith equal load conditions.
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Integrated Circuit Systems, Inc.
LOW SKEW 1-TO-16 FANOUT BUFFER
Test Conditions Minimum 3.135 2.375 VDD = 3.465 VDD = 3.465 VDD = 3.135 VDD = 3.135 VIN = VDD VIN = VDD VIN = 0V VIN = 0V VDD = 2.375V, IOH = -25mA VDD = 2.375V, IOL = 25mA OEx = 0V, VOUT = VDD OEx = 0V, VOUT = 0V -1 -15 -15 100 1.5 0.8 1 2 2 -0.3 -0.3 Ty pical 3.3 2.5 Maximum 3.465 2.625 VDD + 0.3 VDD + 0.3 0.8 0.8 1 1 V V V V A A A A A V V A A Units V
ICS8343
TABLE 4B. DC ELECTRICAL CHARACTERISTICS, VDD = 3.3V5%, VDD1 = VDD2 = 2.5V5%, TA = 0 TO 70C
Sy mbol VDD VDD1, VDD2 VIH VIL IIH IIL IDD VOH VOL IOZH IOZL Parameter Input Operating Supply Voltage Output Operating Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current CLK OEx CLK OEx CLK OEx CLK OEx Input Operating Supply Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current
TABLE 5B. AC ELECTRICAL CHARACTERISTICS, VDD = 3.3V5%, VDD1 = VDD2 = 2.5V5%, TA = 0 TO 70C
Sy mbol fMAX tpLH tpHL tsk(o) tsk(p) tsk(pp) tR tF tPW NOTE 1: NOTE 2: NOTE 3: NOTE 4: NOTE 5: Parameter Maximum Input Frequency Propagation Delay, Low -to-High Propagation Delay, High-to-Low Output Skew ; NOTE 3 Process Skew ; NOTE 4 Part-to-Part Skew ; NOTE 5 Output Rise Time Output Fall Time Output Pulse Width tCY CLE/2 - 0.5 0 < f 200MHz 0< f 200MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 0.5 0.9 tCY CLE/2 1.0 1.4 2.3 2.3 Test Conditions Minimum Ty pical Maximum 200 3.2 3.2 250 450 700 0.8 1.7 tCY CLE/2 + 0.5 Units MHz ns ns ps ps ps ns ns ns
All parameters measured at fMAX unless noted otherw ise. Outputs terminated w ith 50 resistor connected to VDDx/2. Defined as skew across outputs at the same supply voltages and w ith equal load conditions. Defined as skew at the same output on different devices operating at the same supply voltages and w ith equal load conditions. Defined as skew at different outputs on different devices operating at the same supply voltages and w ith equal load conditions.
8343
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Integrated Circuit Systems, Inc.
LOW SKEW 1-TO-16 FANOUT BUFFER
Test Conditions CLK OEx CLK OEx CLK OEx CLK OEx VDD = 2.625 VDD = 2.625 VDD = 2.375 VDD = 2.375 VIN = VDD VIN = VDD VIN = 0V VIN = 0V VDD = 2.375V, IOH = -25mA VDD = 2.375V, IOL = 25mA OEx = 0V, VOUT = VDD OEx = 0V, VOUT = 0V -1 -10 -10 100 1.5 0.8 1 Minimum 2.375 2 2 -0.3 -0.3 Ty pical 2.5 Maximum 2.625 VDD + 0.3 VDD + 0.3 0.7 0.8 1 1 Units V V V V V A A A A A V V A A
ICS8343
TABLE 4C. DC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V5%, TA = 0 TO 70C
Sy mbol VDD, VDD1, VDD2 VIH VIL IIH IIL IDD VOH VOL IOZH IOZL Parameter Operating Supply Voltage Input High Voltage Input Low Voltage Input High Current Input Low Current
Input Operating Supply Current Output High Voltage Output Low Voltage High Impedance Leakage Current High Impedance Leakage Current
TABLE 5C. AC ELECTRICAL CHARACTERISTICS, VDD = VDD1 = VDD2 = 2.5V5%, TA = 0 TO 70C
Sy mbol fMAX tpLH tpHL tsk(o) tsk(p) tsk(pp) tR tF tPW NOTE 1: NOTE 2: NOTE 3: NOTE 4: NOTE 5: Parameter Maximum Input Frequency Propagation Delay, Low -to-High Propagation Delay, High-to-Low Output Skew ; NOTE 3 Process Skew ; NOTE 4 Part-to-Part Skew ; NOTE 5 Output Rise Time Output Fall Time Output Pulse Width tCY CLE/2 - 0.75 0 < f 200MHz 0< f 200MHz Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 Measured on rising edge @VDDx/2 0.5 0.9 tCY CLE/2 1.0 1.4 2.5 2.6 Test Conditions Minimum Ty pical Maximum 133 3.7 3.5 250 500 750 0.8 1.7 tCY CLE/2 + 0.75 Units MHz ns ns ps ps ps ns ns ns
All parameters measured at fMAX unless noted otherw ise. Outputs terminated w ith 50 resistor connected to VDDx/2. Defined as skew across outputs at the same supply voltages and w ith equal load conditions. Defined as skew at the same output on different devices operating at the same supply voltages and w ith equal load conditions. Defined as skew at different outputs on different devices operating at the same supply voltages and w ith equal load conditions.
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PACKAGE OUTLINE & DIMENSIONS
NOTE 4 D NOTE 5, 7 D1 D/2 NOTE 3 -DD1/2
LOW SKEW 1-TO-16 FANOUT BUFFER
ICS8343
e/2
-A, B, OR -D-
b NOTE 3 -ANOTE 3 -B-
E1 e N O T E 5, 7 N/4 TIPS 0.20 C A-B D E/2 E1/2
E N O T E 4 -A, B, OR -D-
4X
SEE DETAIL "A"
8 PLACES 11 / 13
A -H- NOTE 2 / / 0.10 C ccc -CSEE DETAIL "B"
NOTES: 1. ALL DIMENSIONS AND TOLERANCING CONFORM TO ANSI Y14.5-1982 2. DATUM PLANE -H- LOCATED AT MOLD PARTING LINE AND COINCIDENT WITH LEAD, WHERE LEAD EXITS PLASTIC BODY AT BOTTOM OF PARTING LINE. 3. DATUMS A-B AND -D- TO BE DETERMINED AT CENTERLINE BETWEEN LEADS WHERE LEADS EXIT PLASTIC AT DATUM PLANE -H- . 4. TO BE DETERMINED AT SEATING PLACE -C- . 5. DIMENSIONS D1 AND E1 DO NOT INCLUDE MOLD PROTRUSION. 6. N IS THE TOTAL NUMBER OF TERMINALS. 7. THESE DIMENSIONS TO BE DETEREMINED AT DATUM PLANE -H-. 8. PACKAGE TOP DIMENSIONS ARE SMALLER THAN BOTTOM DIMENSIONS AND TOP OF PACKAGE WILL NOT OVERHANG BOTTOM OF PACKAGE. 9. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08mm TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 10. CONTROLLING DIMENSION: MILLIMETER. 11. THIS OUTLINE CONFORMS TO JEDEC PUBLIBCATION 95 REGISTRATION MS-026, VARIATION BBA. 12. A1 IS DEFINED AS THE DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT OF THE PACKAGE.
S Y M B O L A JEDEC VARIAT ION ALL DIMENSIONS IN MILLIMET ERS BBA MIN NOM MAX 1.60 0.05 1.35 1.4 9.00 BSC. 7.00 BSC. 9.00 BSC. 7.00 BSC. 0.45 0.60 32 0.80 BSC. 0.30 0.30 0.37 0.35 0.45 0.40 0.10 0.20 9 0.75 0.15 1.45 4 7, 8 4 7, 8 12
NOTE 9 b
ddd M C A-B S D S WITH LEAD FINISH
N O T E
0.09 / 0.20
0.09 / 0.16
b1 BASE MET AL
A1 A2 D D1
0 MIN.
E E1 L N e
- 0.05 S A2
DATUM PLANE -H-
0.08/0.20 R. 0.25 GAUGE PLANE
A1
0.08 R. MIN. 0.20 MIN. 1.00 REF.
0 - 7 L
b b1 ccc ddd
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ORDERING INFORMATION
Part/Order Number ICS8343Y ICS8343Y T Marking ICS8343Y ICS8343Y Package 32 Lead LQFP
LOW SKEW 1-TO-16 FANOUT BUFFER
Count 250 per tray 2000 Temperature 0C to 70C 0C to 70C
ICS8343
32 Lead LQFP on Tape and Reel
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 8343
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